Circuit complexity: |
|
Multi-layer
fine line circuits
Through hole (castellation) metallization
Filled & plugged hole metallization
Direct chip attach & wire bonding
Chip Scale Packaging (CSP)
|
Substrates: |
|
96%
Alumina
Aluminium
Stainless Steel
Polymer
Any size to a maximum of 155mm x 155mm |
Conductor materials: |
|
Pt/Ag, Pt/Au, Pd/Ag, Au, Ag, Pt/Pd/Ag |
Resistor materials: |
|
Ruthenium Oxide |
Line definition: |
|
0.025mm to 0.050mm (0.001" to 0.002") - Fine Line
0.25mm (0.010") - Standard |
Resistors: |
|
Range: 0.1Ω to 15 GΩ
Tolerance: 0.05% (absolute)
TCR: ±100PPM/°C or better |
Dielectric constant: |
|
1 MHz: 9.3 (For 96% Alumina)
1 GHz: 9.2 (For 96% Alumina) |
Packages: |
|
Conformal coating, SIP,
DIP, PGA,
TO, Flat pack
|
Test specifications: |
|
MIL-STD, DIN, EIAJ,
and JEDEC etc
|
Others: |
|
Capabilities in active
trimming for
Resistance, Capacitance, Frequency
and Voltage.
Polymer thick film printing
Conformal coating
Wafer probing & sawing etc
|
